エレクトロニクス関連商品のオンラインストア

2インチSiCウェハ 2INCH SIC WAFER

売り手 TYK
定価 ¥300,000
販売価格 ¥300,000 定価
販売 ASK
単価
/対して 
スタイル:
2 inch SiC Wafer
Properties Specification
Z Grade(MPD) P Grade D Grade
Diameter 50.8mm±0.38mm
Thickness 350μm±25μm
Wafer Orientation Off axis: 2.0°-4.0°toward[1120]±0.5°for 4H/6H-P,
On axis:〈0001〉±0.5°for 3C-N
Micropipe Density※ 0cm-2
Resistivity※ P-type 4H/6H-P ≤0. 1Ω ·cm ≤0.3Ω ·cm
N-type  3C-N ≤0.8 mΩ ·cm ≤1mΩ ·cm
Primary Flat Orientation    4H/6H-P {1010}±5.0°
   3C-N {110}±5.0°
Primary Flat Length 15.9 mm ± 1.7 mm
Secondary Flat Length 8.0 mm ± 1.7 mm
Secondary Flat Orientation Silicon face up: 90° CW. from Prime flat ±5.0°
Edge Exclusion 1 mm 5 mm
LTV ≤2.5μm ≤2.5 μm
TTV ≤5μm ≤5μm
Bow ≤15μm ≤15μm
Warp ≤25μm ≤30μm
Roughness※ Polish Ra≤ 1 nm
CMP Ra≤0.2 nm Ra≤0.5 nm
Edge Cracks By High Intensity Light None 1 allowed,  ≤1 mm
Hex Plates By High Intensity Light※ Cumulative area ≤ 0.05% Cumulative area ≤3%
Polytype Areas By High Intensity Light※ None Cumulative area≤5%
Visual Carbon Inclusions Cumulative area ≤0.05% Cumulative area ≤3%
Silicon Surface Scratches By High Intensity Light# None 8 scratches to 1×wafer diameter cumulative length
Edge Chips High By Intensity Light None permitted  ≥0.2mm width and depth 5 allowed, ≤1 mm each
Silicon Surface Contamination By High Intensity None
Packaging Multi-wafer Cassette or Single Wafer Container
Notes:
※ Defects limits apply to entire wafer surface except for the edge exclusion area.
# The scratches should be checked on Si face only.

 

※写真は代表的なSiCウェハ(当該品とは別口径)になります。

※在庫品ではありません。納期・数量は都度お問い合わせください。

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